Project Bureau — ATF1502AS Pinout

Project Bureau aims at documenting the bitstream format of Microchip ATF15xx CPLDs. The documentation for ATF1502AS is complete. See more in the repository.

Device ATF1502AS is available in packages TQFP44, PLCC44.

Macrocell	Logic Block	Special Function	Device Pad	TQFP44 Pin	PLCC44 Pin
MC4	A	TDI	M4	1	7
MC5	A		M5	2	8
MC6	A		M6	3	9
MC7	A	PD1	M7	5	11
MC8	A		M8	6	12
MC9	A	TMS	M9	7	13
MC10	A		M10	8	14
MC11	A		M11	10	16
MC12	A		M12	11	17
MC13	A		M13	12	18
MC14	A		M14	13	19
MC15	A		M15	14	20
MC16	A		M16	15	21
MC32	B		M32	18	24
MC31	B	PD2	M31	19	25
MC30	B		M30	20	26
MC29	B		M29	21	27
MC28	B		M28	22	28
MC27	B		M27	23	29
MC26	B		M26	25	31
MC25	B	TCK	M25	26	32
MC24	B		M24	27	33
MC23	B		M23	28	34
MC22	B		M22	30	36
MC21	B		M21	31	37
MC20	B	TDO	M20	32	38
MC19	B		M19	33	39
MC18	B		M18	34	40
MC17	B	CLK3†	M17	35	41
—	—	CLK1†	C1	37	43
—	—	OE1	E1	38	44
—	—	CLR	R	39	1
—	—	CLK2†, OE2	C2	40	2
MC1	A		M1	42	4
MC2	A		M2	43	5
MC3	A		M3	44	6

† Any of the three on-chip global clock networks GCLK1, GCLK2, and GCLK3 can be driven by any of the three pads with global clock input capability, C1, C2, and M17. The special function names CLK1, CLK2, and CLK3 merely illustrate the typical application.